1. Field of the Invention
The present invention relates to the formation of copper lines within an integrated circuit.
2. Description of the Related Art
In integrated circuits comprising copper lines, while layers of dielectrics are being deposited on the copper lines, the formation of copper excrescences also called “hillocks” is observed. The hillocks result from a temperature-activated structural rearrangement of the thin copper layers. They form at the copper grain boundaries, generally during deposition of dielectric layers on the copper lines, after the copper has undergone chemical-mechanical polishing. The hillock density depends on the microstructural properties of the copper deposit.
The effect of the hillocks is deleterious, as they grow between the metal lines and can cause leakage and even short-circuits. This is because the size of the hillocks may be up to 100 nm.
Several attempts have already been made to try to limit the formation of hillocks. It is known that the hillock density can be reduced by modifying the intrinsic copper electroplating parameters or by annealing the copper deposit at various temperatures. It is also known that depositing dielectric layers with NH3/H2 plasma, or eliminating the annealing step between the copper electroplating and the chemical-mechanical polishing of the copper, results in a reduction in the amount of these defects. It has also been attempted to introduce an annealing step after the chemical-mechanical polishing of the copper.
However, these methods are unsatisfactory, and it appears desirable to have integrated circuits that minimize, or even prevent, the formation of these copper excrescences, and also to have a method for preventing the formation of hillocks, and to do so whatever the thickness and the width of the copper lines.
Accordingly, there exists a need for overcoming the disadvantages of the prior art as discussed above.